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ISL55191, ISL55291
Data Sheet March 30, 2007 FN6263.1
Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp
The ISL55191 and ISL55291 are single and dual high speed operational amplifiers featuring low noise, low distortion, and rail-to-rail output drive capability. They are designed to operate with single and dual supplies from +5VDC (2.5VDC) down to +3VDC (1.5VDC). These amplifiers draw 6.1mA of quiescent supply current per amplifier. For power conservation, this family offers a low-power shutdown mode that reduces supply current to 21A and places the amplifiers' output into a high impedance state. The ISL55191 ENABLE logic places the device in the shutdown mode with EN = 0 and the ISL55291 is placed in the shutdown mode with EN = 1. These amplifiers have excellent input and output overload recovery times and outputs that swing rail-to-rail. Their input common mode voltage range includes ground. The ISL55191 and ISL55291 are stable at gains as low as 10 with an input referred noise voltage of 1.3nV/Hz and harmonic distortion products -94dBc (2nd) and -104dBc (3rd) below a 1MHz 2VP-P signal. The ISL55191 is available in space-saving 8 Ld DFN and 8 Ld SOIC packages. The ISL55291 is available in a 10 Ld MSOP package.
Features
* 1.3nV/Hz input voltage noise, fO = 1kHz * Harmonic Distortion -94dBc, -104dBc, fO = 1MHz * Stable at gains as low as 10 * 800MHz gain bandwidth product (AV = 10) * 260V/s slew rate * 6.1mA supply current (21A in disable mode) * 800V maximum offset voltage * 12A input bias current * 3V to 5.5V single supply voltage range * Rail-to-rail output * Pb-free plus anneal available (RoHS compliant)
Applications
* High speed pulse applications * Low noise signal processing * ADC buffers * DAC output amplifiers * Radio systems * Portable equipment
Ordering Information
PART NUMBER (Note) ISL55191IBZ PART MARKING 55191 IBZ TAPE AND REEL PACKAGE (Pb-Free) 8 Ld SOIC PKG. DWG. #
TABLE 1. ENABLE LOGIC ENABLE ISL55191 EN = 1 EN = 0 DISABLE EN = 0 EN = 1
MDP0027 ISL55291
ISL55191IBZ-T13 55191 IBZ ISL55191IRZ 191Z
13" 8 Ld SOIC MDP0027 (2,500 pcs) Tape and Reel 8 Ld DFN L8.3x3D
ISL55191IRZ-T13 191Z ISL55291IUZ 5291Z
13" 8 Ld DFN L8.3x3D (2,500 pcs) Tape and Reel 10 Ld MSOP MDP0043
ISL55291IUZ-T13 5291Z
13" 10 Ld MSOP MDP0043 (2,500 pcs) Tape and Reel
Coming Soon Evaluation Board ISL55191EVAL1Z Coming Soon Evaluation Board ISL55291EVAL1Z NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2006, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL55191, ISL55291 Pinouts
ISL55191 (8 LD SOIC) TOP VIEW
FEEDBACK 1 IN- 2 IN+ 3 V- 4 + 8 EN 7 V+ 6 OUT 5 NC EN FEEDBACK ININ+ 1 2 3 4 +
ISL55191 (8 LD DFN) TOP VIEW
8 7 6 5 V+ OUT NC V-
ISL55291 (10 LD MSOP) TOP VIEW
OUT_A 1 IN-_A 2 IN+_A 3 V- 4 EN_A 5 + + 10 V+ 9 OUT_B 8 IN-_B 7 IN+_B 6 EN_B
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FN6263.1 March 30, 2007
ISL55191, ISL55291
Absolute Maximum Ratings (TA = +25C)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/s Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V
Thermal Information
Thermal Resistance JA (C/W) 8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . TBD 8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . 110 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 115 Ambient Operating Temperature Range . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER DC SPECIFICATIONS VOS V OS --------------T IOS IB VCM CMRR PSRR AVOL VOUT
V+ = 5V, V- = GND, RL = 1k, RG = 30, RF = 270. unless otherwise specified. Parameters are per amplifier. All values are at V+ = 5V, TA = +25C. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
Input Offset Voltage Input Offset Drift vs Temperature Input Offset Current Input Bias Current Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Maximum Output Voltage Swing VCM = 0V to 3.8V V+ = 3V to 5V VO = 0.5V to 4V, RL = 1k Output low, RL = 1k connected to V+/2 Output high, RL = 1k connected to V+/2 4.96 0 85 70 85 -40C to +85C
170 2.2 0.3 -12
800
V V/C
0.7 -19 3.8
A A V dB dB dB
100 77 97 23 4.98 6.1 12 21 9 18 40 40
mV V mA mA A mA mA
IS,ON
Supply Current, Enabled
ISL55191 ISL55291
IS,OFF IO+ IOVSUPPLY VINH VINL IENH
Supply Current, Disabled Short-Circuit Output Current Short-Circuit Output Current Supply Operating Range ENABLE High Level ENABLE Low Level ENABLE Input High Current VEN = V+ ENABLE Input Low Current VEN = VISL55191 (EN) ISL55291 (EN) ISL55191 (EN) ISL55291 (EN) RL = 10 connected to V+/2 RL = 10 connected to V+/2 V+ to V110 110 3 2
132 132 5
V V
0.8 20 0.8 5 20 80 1.5 6.2 80
V nA A A nA
IENL
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FN6263.1 March 30, 2007
ISL55191, ISL55291
Electrical Specifications
PARAMETER AC SPECIFICATIONS GBW HD (4MHz) ISO X-TALK ISL55291 VN IN Gain Bandwidth Product 2nd Harmonic Distortion 3rd Harmonic Distortion Off-state Isolation; EN = 1 ISL55291; fO = 10MHz; AV = +10; VIN = 640mVP-P; EN = 0 ISL55191 Rf/Rg = 909/100; CL = 1.2pF Channel to Channel Crosstalk Input Referred Voltage Noise Input Referred Current Noise fO = 10MHz; AV = +10; VOUT (Driven Channel) = 640mVP-P; Rf/Rg = 909/100; CL = 1.2pF fO = 1kHz fO = 10kHz AV = +10; VOUT = 100mVP-P; Rf/Rg = 909/100 AV = +10; VOUT = 2VP-P; Rf/Rg = 909/100 800 -94 -104 -65 -75 1.2 3.8 MHz dBc dBc dB dB nV/Hz pA/Hz V+ = 5V, V- = GND, RL = 1k, RG = 30, RF = 270. unless otherwise specified. Parameters are per amplifier. All values are at V+ = 5V, TA = +25C. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
TRANSIENT RESPONSE SR tr, tf Large Signal Slew Rate Rise Time, tr 10% to 90% Fall Time, tf 10% to 90% Rise Time, tr 10% to 90% Fall Time, tf 10% to 90% tr, tf, Small Signal tpd tIOL Rise Time, tr 10% to 90% Fall Time, tf 10% to 90% Propagation Delay 10% VIN to 10% VOUT Positive Input Overload Recovery Time, tIOL+; 10% VIN to 10% VOUT Negative Input Overload Recovery Time, tIOL-; 10% VIN to 10% VOUT tOOL AV = +10; VOUT = 3.5VP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VOUT = 1VP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VOUT = 100mVP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VOUT = 100mVP-P; Rf/Rg = 909/100 CL = 1.2pF VS = 2.5V; AV = +10; VIN = +VCM +0.5V; Rf/Rg = 909/100; CL = 1.2pF VS = 2.5V; AV = +10; VIN = -V -0.5V; Rf/Rg = 909/100; CL = 1.2pF 150 260 6.6 5.7 5 4 3 3 1.6 50 30 40 30 540 390 330 50 V/uS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Positive Output Overload Recovery VS = 2.5V; AV = +10; VIN = 2.3VP-P; Time, tOOL+; 10% VIN to 10% VOUT Rf/Rg = 909/100; CL = 1.2pF Negative Output Overload Recovery VS = 2.5V; AV = +10; VIN = 2.3VP-P; Time, tOOL-; 10% VIN to 10% VOUT Rf/Rg = 909/100; CL = 1.2pF
tEN ISL55191
ENABLE to Output Turn-on Delay Time; 10% EN to 10% VOUT ENABLE to Output Turn-off Delay Time; 10% EN to 10% VOUT
AV = +10; VIN = 500mVP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VIN = 500mVP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VIN = 500mVP-P; Rf/Rg = 909/100 CL = 1.2pF AV = +10; VIN = 500mVP-P; Rf/Rg = 909/100 CL = 1.2pF
tEN ISL55291
ENABLE to Output Turn-on Delay Time; 10% EN to 10% VOUT ENABLE to Output Turn-off Delay Time;10% EN to 10% VOUT
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves
1 0 NORMALIZED GAIN (dB) Rf = 249, Rg = 27.4 Rf = 274, Rg = 30.1 Rf = 316, Rg = 34.8 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 AV = 10 RL = 1k VOUT = 100mVP-P 0.1 Rf = 365, Rg = 40.2 Rf = 2.74k, Rg = 301 Rf = 909, Rg = 100 100 1k Rf = 133, Rg = 14.7 1 0 -1 -2 -3 -4 -5 AV = 10 RL = 1k -6 CL = 1.3pF R = 909 -7 Rf = 100 g -8 0.1 1.0 VOUT = 200mV VOUT = 100mV
VOUT = 1V
-9 .01
1.0 10 FREQUENCY (MHz)
10 FREQUENCY (MHz)
100
1k
FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS Rf vs Rg
FIGURE 2. GAIN vs FREQUENCY vs VOUT
1 0 NORMALIZED GAIN (dB) -1 -2 RL = 1k RL = 500 RL = 250 AV = 10 CL = 1.3pF VOUT = 100mVP-P .01 0.1 1.0 RL = 100 GAIN (dB) 100 1k -3 -4 -5 -6 -7 -8 -9
10
65 AV = 1000 Rf/Ri = 100k/100 60 55 50 45 AV = 10 Rf/Ri = 909/100 40 35 30 AV = 100 Rf/Ri = 10k/100 25 20 15 RL = 1k 10 CL = 2.2pF 5V OUT = 100mVP-P 0 0.1 1.0 10 100 1k FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS RLOAD
FIGURE 4. CLOSED LOOP GAIN vs FREQUENCY
2 1 NORMALIZED GAIN (dB) 0 -1 -2 -3 -4 -5 Cg = 0.5pF Rf = 909 -6 R = 100 g -7 RL = 1k VOUT = 100mVP-P -8 .01 0.1 1.0 VS = 2.5V VS = 1.2V NORMALIZED GAIN (dB)
4 3 2 1 0 -1 -2 -3 AV = 10 -4 V+ = 5V RL = 1k -5 V OUT = 100mVP-P -6 0.1 0.1 CL = 1.2pF CL = 2.2pF CL = 4.5pF CL = 23.2pF CL = 13.2pF CL = 8.0pF
10
100
1k
FREQUENCY (MHz)
10 100 FREQUENCY (MHz)
1k
FIGURE 5. GAIN vs FREQUENCY vs VS
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS CLOAD
5
FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
5 4 NORMALIZED GAIN (dB) 3 2 1 0 -1 Cg = 12.8pF Cg = 10.8pF NORMALIZED GAIN (dB) Cg = 9.0pF Cg = 7.6pF Cg = 5.5pF Cg = 3.0pF Cg = 0.8pF 5 4 3 2 1 0 -1 Rf = 909 -2 Rg = 100 AV = 10 -3 RL = 1k VOUT = 100mVP-P -4 VS = 5V -5 .01 0.1 1.0 Cg = 8.7pF Cg = 7.3pF Cg = 5.2pF Cg = 3.8pF Cg = 2.7pF Cg = 1.6pF Cg = 0.5pF
Rf = 909 -2 Rg = 100 A = 10 -3 V RL = 1k -4 VOUT = 100mVP-P VS = 5V -5 .01 0.1 1.0
10
100
1k
10
100
1k
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 7. ISL55191 GAIN vs FREQUENCY FOR VARIOUS Cg
FIGURE 8. ISL55291 GAIN vs FREQUENCY FOR VARIOUS Cg
1M DISABLED INPUT IMPEDANCE () 100k 10k 1k 100 10 1 Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Rg= 100 VSOURCE = 500mVP-P RL = 1k .01 0.1 1.0 10 100 1k FREQUENCY (MHz) ENABLED INPUT IMPEDANCE ()
1M 100k 10k 1k 100 10 1 Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Rg= 100 VSOURCE = 500mVP-P RL = 1k .01 0.1 1.0 10 FREQUENCY (MHz) 100 1k
FIGURE 9. DISABLED INPUT IMPEDANCE vs FREQUENCY
FIGURE 10. ENABLED INPUT IMPEDANCE vs FREQUENCY
10k
100
1k
OUTPUT IMPEDANCE ()
IMPEDANCE ()
Cg = 0.5pF Rf = 909 Rg = 100 10 AV = 10 VSOURCE = 1VP-P
1
100
10
Cg = 0.5pF Rf = 909 Rg = 100 AV = 10 VSOURCE = 1VP-P .01 0.1 1.0 10 100 1k FREQUENCY (MHz)
0.1
0.01 .01
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FIGURE 11. DISABLED OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 12. ENABLED OUTPUT IMPEDANCE vs FREQUENCY
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
0 AV = 10 -10 Cg = 0.8pF R = 1k -20 L Rg = 100 -30 Rf = 909 = 1V V -40 P-P -50 -60 -70 -80 -90 -100 .01 0.1 1.0 10 100 1k 0 A = 10 -10 CV = 0.8pF g -20 RL = 1k Rg = 100 -30 Rf = 909 -40 VP-P = 1V -50 -60 -70 -80 -90 -100 .01 0.1 1.0 10 100 1k
PSRR-
CMRR (dB)
PSRR (dB)
PSRR+
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 13. CMRR vs FREQUENCY
FIGURE 14. PSRR vs FREQUENCY
0 Cg = 1.6pF -20 CL = 1.2pF AV = 10 Rf = 909 -40 R = 100 i VIN = 640mVP-P -60 RL = 1k -80 -100 -120 -140 .01
0 -20 CROSSTALK (dB) -40 -60 -80 -100 -120 .01 Cg = 1.6pF CL = 1.2pF AV = 10 Rf = 909 Ri = 100 VOUT (DRIVEN CHANNEL) = 640mVP-P RL = 1k
OFF ISOLATION (dB)
0.1
1.0 10 FREQUENCY (MHz)
100
1k
0.1
1.0
10
100
1k
FREQUENCY (MHz)
FIGURE 15. OFF ISOLATION vs FREQUENCY
FIGURE 16. ISL55291 CHANNEL TO CHANNEL CROSSTALK vs FREQUENCY
100 AV = 100 Rf = 303 Rg = 3.3 Ri = 1k
1000 INPUT NOISE CURRENT (pA/Hz)
INPUT NOISE VOLTAGE (nV/Hz)
100
10
10 AV = 100 Rf = 303 Rg = 3.3 RL = 1k 1 0.1 1 10 100 1k FREQUENCY (Hz) 10k 100k
1 0.1
1
10 100 1k FREQUENCY (Hz)
10k
100k
FIGURE 17. INPUT VOLTAGE NOISE vs FREQUENCY
FIGURE 18. INPUT CURRENT NOISE vs FREQUENCY
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
0.6 0.4 LARGE SIGNAL (V) 0.2 0 -0.2 -0.4 -0.6
SMALL SIGNAL (V) 40 60 80 100
VS = +2.5V AV = 10 RL = 1k Rg = 100 Rf = 909
0.06
VS = +2.5V AV = 10 RL = 1k Rg = 100 0.02 Rf = 909
0.04 0 -0.02 -0.04 -0.06 0
0
20
20
TIME (ns)
40 60 TIME (ns)
80
100
FIGURE 19. LARGE SIGNAL STEP RESPONSE
FIGURE 20. SMALL SIGNAL STEP RESPONSE
50 45 40 OVERSHOOT (%) 35 30 25 20 15 10 5 0 0
3.1
2.6 2.4 2.2 2.0 OUTPUT 1.8 1.6 1.4 1.2 80 100 120 140 160 180 200 TIME (ns) OUTPUT (V) OUTPUT (V) INPUT
VS = +2.5V AV = 10 RL = 1k Rg = 100 Rf = 909
VOUT = 0.1V VOUT = 0.5V VOUT = 1V
2.9 2.7 INPUT (V) 2.5 2.3 2.1
VOUT = 3.5V 1.9 1.7 5 10 15 20 25 30 CL (pF) 35 40 45 50 0
AV = 10 RL = 10k VS = 2.5V Rg = 100 Rf = 909 VIN = VCM +0.5V 20 40 60
FIGURE 21. PERCENT OVERSHOOT FOR VARIOUS CLOAD
FIGURE 22. ISL55291 POSITIVE INPUT RECOVERY TIME
-2.2 -2.3 -2.4 -2.5 INPUT (V) -2.6 -2.7 -2.8 -2.9 -3.0 -3.1 0 20 40 60 80 AV = 10 RL = 10k VS = 2.5V Rg = 100 Rf = 909 VIN = -V-0.5V 100 120 140 160 180 200 TIME (ns) INPUT OUTPUT
1.5 1.0 0.5 OUTPUT (V) 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0
0.6 0.4 0.2 INPUT (V) 0 OUTPUT -0.2 -0.4 -0.6 0 20 40 60 80 100 120 140 160 180 200 TIME (ns) AV = 10 RL = 10k VS = +2.5V Rg = 100 Rf = 909 VIN = 0.7VP-P INPUT
3 2 1 0 -1 -2 -3
FIGURE 23. ISL55291 NEGATIVE INPUT RECOVERY RECOVERY
FIGURE 24. OUTPUT OVERLOAD RECOVERY
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
3.0 ENABLE/OUTPUT (V) 2.5 2.0 1.5 1.0 0.5 0 -0.5 0 0.5 1
AV = 10 Rf = 909 Rg= 100 RL = 10k VIN = 280mV 6.0 280 270 SLEW RATE (V/s) 260 250 240 230 220 3.0 3.5 4.0 VS (V) 4.5 5.0 5.5 AV = 10 Rf = 909 RL = 10k Ri= 100
OUTPUT
5.0 4.0 3.0 2.0 1.0 ENABLE (V)
ENABLE
0 -1.0
1.5 2 2.5 TIME (s)
3
3.5
4
FIGURE 25. ENABLE TO OUTPUT DELAY
FIGURE 26. ISL55291 POSITIVE SLEW RATE vs VS
-260 -270 SLEW RATE (V/s) -280 -290 -300 -310 -320 3.0
3.5
4.0 VS (V)
4.5
5.0
5.5
FIGURE 27. ISL55291 NEGATIVE SLEW RATE vs VS
19 18 17 CURRENT (mA) 16 15 14 13 12 11 10
n = 2000 34 MAX 30 CURRENT (A) 26 22 18
n = 2000 MAX
MEDIAN
MEDIAN
MIN
MIN 14 -40
9 -40
-20
0
20 40 TEMPERATURE (C)
60
80
-20
0
20 40 TEMPERATURE (C)
60
80
FIGURE 28. SUPPLY CURRENT ENABLED vs TEMPERATURE VS = 2.5V
FIGURE 29. SUPPLY CURRENT DISABLED vs TEMPERATURE VS = 2.5V
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
16 n = 2000 15 14 CURRENT (mA) CURRENT (A) 13 12 11 10 MIN 9 8 -40 -20 0 20 40 TEMPERATURE (C) 60 80 6 4 -40 MIN -20 0 20 40 TEMPERATURE (C) 60 80 MEDIAN MAX 18 16 14 12 10 8 n = 2000 MEDIAN MAX 20
FIGURE 30. SUPPLY CURRENT ENABLED vs TEMPERATURE VS = 1.5V
FIGURE 31. SUPPLY CURRENT DISABLED vs TEMPERATURE VS = 1.5V
800 600
500 n = 2000 300 MAX 100 MEDIAN VOS (V) -100 -300 -500 MIN MIN 0 20 40 TEMPERATURE (C) 60 80 -700 -40 -20 0 20 40 60 80 n = 2000 MAX MEDIAN
400 VOS (V) 200 0 -200 -400 -40
-20
TEMPERATURE (C)
FIGURE 32. VIO vs TEMPERATURE VS = 2.5V
FIGURE 33. VIO vs TEMPERATURE VS = 1.5V
-10 -10.5 -11 -11.5 IBIAS + (A) -12 -12.5 -13 -13.5 -14 -14.5 -15 -40 -20 0 20 40 MIN 60 80 MEDIAN IBIAS - (A) n = 2000 MAX
-10 -10.5 -11 -11.5 -12 -12.5 -13 -13.5 -14 -14.5 -15 -40
n = 2000 MAX MEDIAN
MIN
-20
0
20
40
60
80
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 34. IBIAS+ vs TEMPERATURE VS = 2.5V
FIGURE 35. IBIAS- vs TEMPERATURE VS = 2.5V
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
-10.0 -10.5 -11.0 -11.5 IBIAS + (A) -12.0 -12.5 -13.0 -13.5 -14.0 -14.5 -15.0 -40 -20 0 20 40 TEMPERATURE (C) 60 80 -15 -40 -20 0 20 40 60 80 MIN MEDIAN n = 2000 MAX IBIAS - (A) -11 -12 MEDIAN -13 -14 MIN -9 n = 2000 -10 MAX
TEMPERATURE (C)
FIGURE 36. IBIAS+ vs TEMPERATURE VS = 1.5V
FIGURE 37. IBIAS- vs TEMPERATURE VS = 1.5V
105 103 101 CMRR (dB) 99 97 95 93 91
n = 2000
81 80 79 V+ = 5V PSRR (dB) 78 77 76 75 74
n = 2000 MAX MEDIAN
V+ = 3V
MIN -20 0 20 40 60 80 73 -40 -20 0 20 40 60 80
-40
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 38. CMRR vs TEMPERATURE V+ = 2.5V, 1.5V
FIGURE 39. PSRR vs TEMPERATURE 1.5V TO 2.5V
4.986 n = 2000 4.984 4.982 VOUT (V) 4.98 4.978 MIN 4.976 4.974 4.972 -40 -20 0 20 40 TEMPERATURE (C) 60 80 MAX MEDIAN VOUT (mV)
38 36 34 32 30 28 26 24 22 20
n = 2000 MAX
MEDIAN
MIN
18 -40
-20
0
20
40
60
80
TEMPERATURE (C)
FIGURE 40. VOUT HIGH vs TEMPERATURE VS = 2.5V, RL = 1K
FIGURE 41. VOUT LOW vs TEMPERATURE VS = 2.5V, RL = 1k
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Typical Performance Curves (Continued)
2.990 n = 2000 2.988 MAX 2.986 VOUT (V) 2.984 2.982 2.980 MIN 2.978 2.976 -40 MEDIAN VOUT (V) 35 32 MEDIAN 29 26 MIN 23 -20 0 20 40 TEMPERATURE (C) 60 80 -40 -20 0 20 40 60 80 TEMPERATURE (C) 38 41 n = 2000 MAX
FIGURE 42. VOUT HIGH vs TEMPERATURE VS = 1.5V, RL = 1k
FIGURE 43. VOUT LOW vs TEMPERATURE VS = 1.5V, RL = 1k
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Pin Descriptions
ISL55191 (8 LD SOIC) 5 2 ISL55191 (8 LD DFN) 6 3 2 (A) 8 (B) ISL55291 (10 LD MSOP) PIN NAME NC INFUNCTION Not connected Inverting input
V+
EQUIVALENT CIRCUIT
IN-
IN+
VCircuit 1
3 4 6
4 5 7
3 (A) 7 (B) 4 1 (A) 9 (B)
IN+ VOUT
Non-inverting input Negative supply Output
(See circuit 1)
V+
OUT
VCircuit 2
7
8
10 5 (A) 6 (B)
V+ EN
Positive supply Enable pin with internal pulldown referenced to the -V pin; Logic "1" selects the disabled state; Logic "0" selects the enabled state.
V+
EN VCircuit 3a
8
1
EN
Enable pin with internal pulldown referenced to the -V pin; Logic "0" (-V) selects the disabled state; Logic "1" (+V) selects the enabled state.
V+
EN VCircuit 3b
1
2
FEEDBACK Feedback pin to reduce INcapacitance
FEEDBACK
V+
OUT
VCircuit 4
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Applications Information
Product Description
The ISL55191 and ISL55291 are voltage feedback operational amplifiers designed for communication and imaging applications requiring very low voltage and current noise. Both parts features low distortion while drawing moderately low supply current. The ISL55191 and ISL55291 use a classical voltage-feedback topology which allows them to be used in a variety of applications where currentfeedback amplifiers are not appropriate because of restrictions placed upon the feedback element used with the amplifier. where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated as follows:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------RL (EQ. 2)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
Enable/Power-Down
Both devices can be operated from a single supply with a voltage range of +3V to +5V, or from split 1.5V to 2.5V. The logic level input to the ENABLE pins are TTL compatible and are referenced to the -V terminal in both single and split supply applications. The following discussion assumes single supply operation. The ISL55191 uses a logic "0" (<0.8V) to disable the amplifier and the ISL55291 uses a logic "1" (>2V) to disable its amplifiers. In this condition, the output(s) will be in a high impedance state and the amplifier(s) current will be reduced to 21A. The ISL55191 has an internal pull-up on the EN pin and is enabled by either floating or tying the EN pin to a voltage >2V. The ISL55291 has internal pull-downs on the EN pins and are enabled by either floating or tying the EN pins to a voltage <0.8V. The enable pins should be tied directly to their respective supply pins when not being used (EN tied to -V for the ISL55291 and EN tied to +V for the ISL55191).
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Low impedance ground plane construction is essential. Surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7F tantalum capacitor in parallel with a 0.01F capacitor has been shown to work well when placed at each supply pin. For good AC performance, parasitic capacitance should be kept to a minimum, especially at the inverting input. When ground plane construction is used, it should be removed from the area near the inverting input to minimize any stray capacitance at that node. Carbon or Metal-Film resistors are acceptable with the Metal-Film resistors giving slightly less peaking and bandwidth because of additional series inductance. Use of sockets (particularly for the SOIC package) should be avoided if possible. Sockets add parasitic inductance and capacitance which will result in additional peaking and overshoot. For inverting gains, this parasitic capacitance has little effect because the inverting input is a virtual ground, but for noninverting gains, this capacitance (in conjunction with the feedback and gain resistors) creates a pole in the feedback path of the amplifier. This pole, if low enough in frequency, has the same destabilizing effect as a zero in the forward open-loop response. The use of large-value feedback and gain resistors exacerbates the problem by further lowering the pole frequency (increasing the possibility of oscillation.).
Current Limiting
The ISL55191 and ISL55291 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 1)
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FN6263.1 March 30, 2007
ISL55191, ISL55291
CURRENT INPUT
+5VDC
RF 10k
RGRT 100 PARASITIC L TO R RSENSE 0.01 RG+ 100
ISL55191 IN- V+ FEEDBACK OUT IN+ VRL RREF 10k
VOUT
VREF +2.5V CURRENT INPUT
FIGURE 44. GROUND SIDE CURRENT SENSE AMPLIFIER
Current Sense Application Circuit
The schematic in Figure 44 provides an example of utilizing the ISL55191 high speed performance with the ground sensing input capability to implement a single-supply, G = 10 differential low side current sense amplifier. The reference voltage applied to VREF (+2.5V) defines the amplifier output 0A current sense reference voltage at one half the supply voltage level (VS = +5VDC), and RSENSE sets the current sense gain and full scale values. In this example the current gain is 10A/V over a maximum current range of slightly less than 25A with RSENSE = 0.01. The amplifier VIO error (800V max) and input bias offset current IIO error (0.7A) together contribute less than 10mV (100mA) at the output for better than 0.2% full scale accuracy. The amplifier's high slew rate and fast pulse response make this circuit suitable for low-side current sensing in PMWM and motor control applications. The excellent input overload recovery response enables the circuit to maintain performance in the presence of parasitic inductance that cause fast rise and falling edge spikes that can momentarily overload the input stage of the amplifier.
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
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FN6263.1 March 30, 2007
ISL55191, ISL55291
Package Outline Drawing
L8.3x3D
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (DFN) Rev 0, 9/06
PIN 1 INDEX AREA
B 0.075 C 4X
3.00
A
1.45
PIN 1 INDEX AREA
6X 0.50 BSC 3.00 1.75 1.50 REF
8X 0.25
0.10 M C A B
8X 0.40
TOP VIEW
2.20
BOTTOM VIEW
(8X 0.25)
(8X 0.60)
SEE DETAIL X''
0.10 C 0.85
C SEATING PLANE 0.08 C
(1.75) (6X 0.50 BSC)
SIDE VIEW
(1.45) (2.20)
TYPICAL RECOMMENDED LAND PATTERN
c
0.20 REF
5
0~0.05
DETAIL "X"
NOTES: 1. Controlling dimensions are in mm. Dimensions in ( ) for reference only. 2. Unless otherwise specified, tolerance : Decimal 0.05 Angular 2 3. Dimensioning and tolerancing conform to JEDEC STD MO220-D. 4. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 5. Tiebar shown (if present) is a non-functional feature.
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FN6263.1 March 30, 2007
ISL55191, ISL55291 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 18
FN6263.1 March 30, 2007

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